Computers include at least one central processing unit (CPU) that follows instructions and manipulates data. These instructions and data are stored in various types of memory. Managing the flow of information between the CPU and the memory requires considerable processing, which would interfere with CPU operation. A memory controller is therefore provided to manage the flow of information between the CPU and the memory. The memory controller can be integrated with the CPU, or can be a separate integrated circuit.
Ideally, a CPU in operation is never starved of instructions or data. If the communication between the CPU and the memory controller is too slow, the CPU can waste valuable time awaiting information. The speed of a memory system has two essential characteristics, latency and bandwidth. “Latency” refers to the delay between a memory request and information delivery, whereas “bandwidth” refers to the amount of information that can be delivered by the memory per unit time.
Processing speed can be heavily dependent upon memory latency. Memory devices and systems have therefore been designed to minimize latency. However, latency is but one variable in system performance, and the cost of achieving low latency can be prohibitive. Processes that make relatively few requests for larger amounts of information can be, for example, more impacted by memory bandwidth than latency. Computer users may tolerate—or even fail to notice—longer latencies where bandwidth or capacity are more significant factors. Computer systems with longer memory latencies would therefore be in demand if the relatively minor loss of performance was accompanied by significant cost savings, countervailing capacity improvements, or both.
The figures are illustrations by way of example, and not by way of limitation. Like reference numerals in the figures refer to similar elements.